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Author SHA1 Message Date
Henry Potgieter
efa8d3833c fix(heltec32_v4): set OCP_TUNED to 0x38 per SX1262 datasheet 
The SX1262 datasheet specifies that SetPaConfig resets OCP to 0x38
(140 mA) for SX1262 devices, vs 0x18/60 mA for SX1261. The Heltec V4
external PA draws from Vext, not the SX1262 supply rail, so the
brownout risk that prompted lowering OCP on other boards (see eab0284)
does not apply here. Hardware-validated: 500 packets at 22 dBm, 0
errors, 0 resets, stable at 72 C peak.
 2026-04-20 20:56:57 -04:00
Mark Qvist
3167a3e679 Cleanup 2026-04-21 00:33:53 +02:00
Mark Qvist
fe594b2048 Turn off display on T114 2026-04-21 00:33:18 +02:00
Mark Qvist
9fd0ae33d2 Added support for Heltec v4.3 PA and LNA 2026-04-20 17:16:39 +02:00
Mark Qvist
0c07c1b856 Updated version 2026-04-19 15:10:06 +02:00
markqvist
ae0434726b
 		Merge pull request #132 from GlassOnTin/sx1262-errata-fixes 
Fix SX1262 errata 15.4 (IQ polarity) and 15.1 (modulation quality)
 2026-04-19 14:50:16 +02:00
GlassOnTin
5d2f0b93e3 Fix SX1262 errata 15.4 (IQ polarity) and 15.1 (modulation quality) 
Errata 15.4: SetPacketParams resets register 0x0736 to an incorrect
default for IQ polarity. For standard IQ (no inversion), bit 2 must
be SET after every SetPacketParams call. Without this, LoRa RX
demodulation can fail silently while TX continues to work — the
symptom mimics a hardware failure.

Errata 15.1: Register 0x0889 bit 2 controls modulation quality at
different bandwidths. It must be cleared for 500 kHz BW and set for
all others. The previous implementation was a no-op stub.

Both fixes are from the SX1262 datasheet errata (DS_SX1261-2_V2.1)
and apply to all SX1262-based boards.
 2026-03-29 17:53:28 +01:00
Mark Qvist
180207aa2e Updated readme 2025-12-28 01:07:31 +01:00
Mark Qvist
4564dc3e9e Merge branch 'master' of github.com:markqvist/RNode_Firmware 2025-12-22 22:20:14 +01:00
Mark Qvist
c1efbe727d Updated readme 2025-12-22 22:19:06 +01:00
markqvist
15b8219966
 		Merge pull request #122 from vehsamrak/fix-readme-heltecv4 
Heltec LoRa32 v4 devices added to supported hardware list in README
 2025-12-19 14:10:44 +01:00
Petr Karmashev
5ac359ba06
 		Heltec LoRa32 v4 devices added to supported hardware list in README 2025-12-18 16:46:21 +07:00
Mark Qvist
7f868c6c28 Added interference display to waterfall. Improved Heltec V4 false interference rejection. 2025-11-22 14:19:23 +01:00
Mark Qvist
9ea2a589cb Updated console image 2025-11-22 02:09:26 +01:00
Mark Qvist
15b3e7f605 Cleanup 2025-11-22 01:12:03 +01:00
Mark Qvist
e0f3ac1aee Cleanup 2025-11-22 00:08:47 +01:00
Mark Qvist
7b0658b197 Handle GC1109 LNA gain variance properly 2025-11-22 00:04:56 +01:00
Mark Qvist
b8ab1caf96 Updated console image 2025-11-21 16:51:43 +01:00
Mark Qvist
6b21940e59 Improved Heltec v4 LNA gain-value threshold parameter 2025-11-21 16:00:40 +01:00
Mark Qvist
8382d4a08d Fixed packet buffer FIFO state mismatch on high-bitrate queue processing if raw underlying byte buffer was full 2025-11-21 14:07:43 +01:00
Mark Qvist
5e98407ee2 Updated console image 2025-11-19 16:12:56 +01:00
Mark Qvist
af904efb9e Updated console build 1.85 2025-11-19 16:05:21 +01:00
Mark Qvist
99481f751c Cleanup 2025-11-19 15:01:43 +01:00
Mark Qvist
c48b7bce4c Cleanup 2025-11-19 14:40:45 +01:00
Mark Qvist
121f9e79e8 Added support for handling noise floor calculations on devices with LNA gain variance during LNA recalibration. Fixed potential incoming packet buffer corruption on split packet reception at high bitrates. 2025-11-19 14:40:34 +01:00
Mark Qvist
1e054097dd Added WiFi host read timeout and automatic disconnect. Added automatic WiFi reconnect in STA mode. Improved host reconnection reliability and responsiveness. 2025-11-18 03:03:49 +01:00
Mark Qvist
439bece78e Set hostname on wifi network 2025-11-17 19:18:41 +01:00
Mark Qvist
86ee47bb65 Cleanup 2025-11-17 18:47:50 +01:00
Mark Qvist
c467b82014 Added ability to specify static IP for WiFi STA connection 2025-11-17 18:47:18 +01:00
Mark Qvist
90539caee9 Cleanup 2025-11-17 17:04:54 +01:00
Mark Qvist
3f7a6a8941 Updated version 2025-11-17 16:41:40 +01:00
Mark Qvist
2319813a65 Added support for connecting ESP32S3 RNodes over WiFi 2025-11-17 16:41:25 +01:00
Mark Qvist
5b7b0d3afe Updated makefile 2025-11-14 01:40:06 +01:00
Mark Qvist
aa852f4aed Fixed device name offset in display 2025-11-14 01:16:38 +01:00
Mark Qvist
6d4a48af1f Fixed incorrect display drawing offset 2025-11-10 18:34:23 +01:00
Mark Qvist
c8bb7490a2 Build fixes 1.84 2025-11-10 18:19:55 +01:00
Mark Qvist
3cc2041516 Added device ID to display 2025-11-10 17:27:56 +01:00
Mark Qvist
89ea59bbe6 Added CPU temperature measurement and reporting on ESP32S3 2025-11-10 16:39:09 +01:00
Mark Qvist
8a3db4f0c3 Cleanup 2025-11-10 15:50:46 +01:00
Mark Qvist
59c0a60b33 Reworked battery charge state detection for boards with only ADC-based PMU. Improved battery charge status info on display. 2025-11-10 15:49:52 +01:00
Mark Qvist
427c06bf81 Reverted battery parameters for Heltec v3 to correct values 2025-11-10 12:02:36 +01:00
markqvist
ee9335517e
 		Merge pull request #109 from alligitor/Heltec_V3_Battery_Status 
Fixed reading of battery voltage for Heltec V3.2.
 2025-11-10 11:45:15 +01:00
markqvist
1e9654012f
 		Merge pull request #116 from Am0g-us/patch-1 
Fix generic esp32 reset pin
 2025-11-10 11:43:06 +01:00
Mark Qvist
d06ec065de Implemented support for Heltec V4 with PA 2025-11-07 19:13:29 +01:00
Mark Qvist
e2c1cd3766 Added support for LoRa PAs and output power mapping according to PA gain curve 2025-11-07 19:11:56 +01:00
Mark Qvist
1710740947 Cleanup 2025-11-01 15:34:38 +01:00
Mark Qvist
2947df3349 Added Heltec v4 board defines and scaffold 2025-11-01 15:33:24 +01:00
Am0g-us
3eae317cdf
 		Fix generic esp32 reset pin 
Fix for critical Issue: GPIO 36 on the ESP32 is an input-only pin (part of the ADC1 group along with GPIO 34, 35, and 39). This is a hardware limitation of the ESP32 microcontroller. These pins cannot be configured as outputs.

This means the current pin assignment in the firmware will not work correctly for the reset functionality, as pinMode(_reset, OUTPUT) and digitalWrite(_reset, LOW/HIGH) calls will fail to actually drive the pin. The reset pin for a generic ESP32 board should be reassigned to a GPIO that supports output mode (any GPIO that is not 34, 35, 36, or 39).

This appears to be a configuration error in the board definition that would prevent proper initialization of the SX1278 LoRa module on these board configurations.
 2025-10-19 01:30:57 +00:00
Mark Qvist
1817137767 Added LR1110 files 2025-10-17 22:44:30 +02:00
Mark Qvist
9d50259946 Updated version 1.83 2025-07-17 20:17:46 +02:00