Ahmet Inan
40fdc7d590
found better parameters via simulation
2025-07-25 21:53:55 +02:00
Ahmet Inan
a626441665
made specifying the mode nicer
2025-07-21 11:09:38 +02:00
Ahmet Inan
53acfab11c
added support for base37 encoded call sign
2025-07-18 15:24:27 +02:00
Ahmet Inan
88e25f1abb
sample rate of 8000 Hz not supported anymore
2025-07-16 12:37:27 +02:00
Ahmet Inan
34abccdf6e
trimmed modes to free some bits in first symbol
2025-07-13 08:23:34 +02:00
Ahmet Inan
50ac5c03e3
added debugging options
2025-07-07 09:07:37 +02:00
Ahmet Inan
a3e02dd523
use mode 17 in example
2025-07-07 06:31:48 +02:00
Ahmet Inan
8cab519b16
moved common code to Common class
2025-07-02 12:02:36 +02:00
Ahmet Inan
8d45b0546f
adapted to new scheme
2025-07-02 06:50:53 +02:00
Ahmet Inan
68e0e81593
decoder depends on Schmidl & Cox header
2025-06-27 08:03:02 +02:00
Ahmet Inan
1076bb953b
replaced deprecated -Ofast with -O3 -ffast-math
2025-06-12 12:41:19 +02:00
Ahmet Inan
a56466c08f
added support for multiple input and output files
2024-01-25 17:26:36 +01:00
Ahmet Inan
88e8a3ad94
replaced frequency offset paramter with operation mode
2024-01-03 17:22:12 +01:00
Ahmet Inan
d28adaeb13
added aarch64 example
2023-12-13 20:31:39 +01:00
Ahmet Inan
99b6a4e963
use a shortened systematic polar code and CA-SCL decoding
...
using SPC(64800, 43072):
mode 6: 8PSK, 2700 Hz BW and about 10 seconds long
mode 7: 8PSK, 2500 Hz BW and about 11 seconds long
mode 8: QPSK, 2500 Hz BW and about 16 seconds long
mode 9: QPSK, 2250 Hz BW and about 18 seconds long
using SPC(64512, 43072):
mode 10: 8PSK, 3200 Hz BW and about 9 seconds long
mode 11: 8PSK, 2400 Hz BW and about 11 seconds long
mode 12: QPSK, 2400 Hz BW and about 16 seconds long
mode 13: QPSK, 1600 Hz BW and about 24 seconds long
2021-09-03 20:52:09 +02:00
Ahmet Inan
07682ac19f
added cross-compilation and testing for ARMv7 with NEON
2021-06-15 07:55:08 +02:00
Ahmet Inan
1e0b2199af
use C++17 for aligned new
2021-06-11 11:12:52 +02:00
Ahmet Inan
3546d516b1
Initial commit
2021-06-11 11:12:44 +02:00