mirror of
https://github.com/aicodix/modem.git
synced 2026-04-27 14:30:34 +00:00
added prepare()
This commit is contained in:
Ahmet Inan
parent
d22e18bb91
commit
0fac5fc62b
2 changed files with 108 additions and 119 deletions
187
decode.cc
187
decode.cc
|
|
@ -260,52 +260,34 @@ struct Decoder
|
|||
}
|
||||
cmplx mod_map(code_type *b)
|
||||
{
|
||||
switch (oper_mode) {
|
||||
case 6:
|
||||
case 7:
|
||||
case 10:
|
||||
case 11:
|
||||
return PhaseShiftKeying<8, cmplx, code_type>::map(b);
|
||||
case 8:
|
||||
case 9:
|
||||
case 12:
|
||||
case 13:
|
||||
switch (mod_bits) {
|
||||
case 2:
|
||||
return PhaseShiftKeying<4, cmplx, code_type>::map(b);
|
||||
case 3:
|
||||
return PhaseShiftKeying<8, cmplx, code_type>::map(b);
|
||||
}
|
||||
return 0;
|
||||
}
|
||||
void mod_hard(code_type *b, cmplx c)
|
||||
{
|
||||
switch (oper_mode) {
|
||||
case 6:
|
||||
case 7:
|
||||
case 10:
|
||||
case 11:
|
||||
PhaseShiftKeying<8, cmplx, code_type>::hard(b, c);
|
||||
break;
|
||||
case 8:
|
||||
case 9:
|
||||
case 12:
|
||||
case 13:
|
||||
switch (mod_bits) {
|
||||
case 2:
|
||||
PhaseShiftKeying<4, cmplx, code_type>::hard(b, c);
|
||||
break;
|
||||
case 3:
|
||||
PhaseShiftKeying<8, cmplx, code_type>::hard(b, c);
|
||||
break;
|
||||
}
|
||||
}
|
||||
void mod_soft(code_type *b, cmplx c, value precision)
|
||||
{
|
||||
switch (oper_mode) {
|
||||
case 6:
|
||||
case 7:
|
||||
case 10:
|
||||
case 11:
|
||||
PhaseShiftKeying<8, cmplx, code_type>::soft(b, c, precision);
|
||||
break;
|
||||
case 8:
|
||||
case 9:
|
||||
case 12:
|
||||
case 13:
|
||||
switch (mod_bits) {
|
||||
case 2:
|
||||
PhaseShiftKeying<4, cmplx, code_type>::soft(b, c, precision);
|
||||
break;
|
||||
case 3:
|
||||
PhaseShiftKeying<8, cmplx, code_type>::soft(b, c, precision);
|
||||
break;
|
||||
}
|
||||
}
|
||||
const cmplx *next_sample()
|
||||
|
|
@ -316,6 +298,79 @@ struct Decoder
|
|||
tmp = hilbert(blockdc(tmp.real()));
|
||||
return input_hist(tmp);
|
||||
}
|
||||
bool prepare()
|
||||
{
|
||||
switch (oper_mode) {
|
||||
case 6:
|
||||
cons_cols = 432;
|
||||
mod_bits = 3;
|
||||
code_order = 16;
|
||||
cons_bits = 64800;
|
||||
mesg_bits = 43808;
|
||||
frozen_bits = frozen_64800_43072;
|
||||
break;
|
||||
case 7:
|
||||
cons_cols = 400;
|
||||
mod_bits = 3;
|
||||
code_order = 16;
|
||||
cons_bits = 64800;
|
||||
mesg_bits = 43808;
|
||||
frozen_bits = frozen_64800_43072;
|
||||
break;
|
||||
case 8:
|
||||
cons_cols = 400;
|
||||
mod_bits = 2;
|
||||
code_order = 16;
|
||||
cons_bits = 64800;
|
||||
mesg_bits = 43808;
|
||||
frozen_bits = frozen_64800_43072;
|
||||
break;
|
||||
case 9:
|
||||
cons_cols = 360;
|
||||
mod_bits = 2;
|
||||
code_order = 16;
|
||||
cons_bits = 64800;
|
||||
mesg_bits = 43808;
|
||||
frozen_bits = frozen_64800_43072;
|
||||
break;
|
||||
case 10:
|
||||
cons_cols = 512;
|
||||
mod_bits = 3;
|
||||
code_order = 16;
|
||||
cons_bits = 64512;
|
||||
mesg_bits = 44096;
|
||||
frozen_bits = frozen_64512_43072;
|
||||
break;
|
||||
case 11:
|
||||
cons_cols = 384;
|
||||
mod_bits = 3;
|
||||
code_order = 16;
|
||||
cons_bits = 64512;
|
||||
mesg_bits = 44096;
|
||||
frozen_bits = frozen_64512_43072;
|
||||
break;
|
||||
case 12:
|
||||
cons_cols = 384;
|
||||
mod_bits = 2;
|
||||
code_order = 16;
|
||||
cons_bits = 64512;
|
||||
mesg_bits = 44096;
|
||||
frozen_bits = frozen_64512_43072;
|
||||
break;
|
||||
case 13:
|
||||
cons_cols = 256;
|
||||
mod_bits = 2;
|
||||
code_order = 16;
|
||||
cons_bits = 64512;
|
||||
mesg_bits = 44096;
|
||||
frozen_bits = frozen_64512_43072;
|
||||
break;
|
||||
default:
|
||||
return false;
|
||||
}
|
||||
cons_cnt = cons_bits / mod_bits;
|
||||
return true;
|
||||
}
|
||||
Decoder(uint8_t *out, DSP::ReadPCM<value> *pcm, int skip_count) :
|
||||
pcm(pcm), correlator(mls0_seq()), crc0(0xA8F4), crc1(0xD419CC15)
|
||||
{
|
||||
|
|
@ -375,76 +430,10 @@ struct Decoder
|
|||
continue;
|
||||
}
|
||||
oper_mode = md & 255;
|
||||
switch (oper_mode) {
|
||||
case 6:
|
||||
cons_cols = 432;
|
||||
mod_bits = 3;
|
||||
code_order = 16;
|
||||
cons_bits = 64800;
|
||||
mesg_bits = 43808;
|
||||
frozen_bits = frozen_64800_43072;
|
||||
break;
|
||||
case 7:
|
||||
cons_cols = 400;
|
||||
mod_bits = 3;
|
||||
code_order = 16;
|
||||
cons_bits = 64800;
|
||||
mesg_bits = 43808;
|
||||
frozen_bits = frozen_64800_43072;
|
||||
break;
|
||||
case 8:
|
||||
cons_cols = 400;
|
||||
mod_bits = 2;
|
||||
code_order = 16;
|
||||
cons_bits = 64800;
|
||||
mesg_bits = 43808;
|
||||
frozen_bits = frozen_64800_43072;
|
||||
break;
|
||||
case 9:
|
||||
cons_cols = 360;
|
||||
mod_bits = 2;
|
||||
code_order = 16;
|
||||
cons_bits = 64800;
|
||||
mesg_bits = 43808;
|
||||
frozen_bits = frozen_64800_43072;
|
||||
break;
|
||||
case 10:
|
||||
cons_cols = 512;
|
||||
mod_bits = 3;
|
||||
code_order = 16;
|
||||
cons_bits = 64512;
|
||||
mesg_bits = 44096;
|
||||
frozen_bits = frozen_64512_43072;
|
||||
break;
|
||||
case 11:
|
||||
cons_cols = 384;
|
||||
mod_bits = 3;
|
||||
code_order = 16;
|
||||
cons_bits = 64512;
|
||||
mesg_bits = 44096;
|
||||
frozen_bits = frozen_64512_43072;
|
||||
break;
|
||||
case 12:
|
||||
cons_cols = 384;
|
||||
mod_bits = 2;
|
||||
code_order = 16;
|
||||
cons_bits = 64512;
|
||||
mesg_bits = 44096;
|
||||
frozen_bits = frozen_64512_43072;
|
||||
break;
|
||||
case 13:
|
||||
cons_cols = 256;
|
||||
mod_bits = 2;
|
||||
code_order = 16;
|
||||
cons_bits = 64512;
|
||||
mesg_bits = 44096;
|
||||
frozen_bits = frozen_64512_43072;
|
||||
break;
|
||||
default:
|
||||
if (!prepare()) {
|
||||
std::cerr << "operation mode " << oper_mode << " unsupported." << std::endl;
|
||||
continue;
|
||||
}
|
||||
cons_cnt = cons_bits / mod_bits;
|
||||
std::cerr << "oper mode: " << oper_mode << std::endl;
|
||||
if ((md>>8) == 0 || (md>>8) >= 129961739795077L) {
|
||||
std::cerr << "call sign unsupported." << std::endl;
|
||||
|
|
|
|||
40
encode.cc
40
encode.cc
|
|
@ -184,29 +184,15 @@ struct Encoder
|
|||
}
|
||||
cmplx mod_map(code_type *b)
|
||||
{
|
||||
switch (oper_mode) {
|
||||
case 6:
|
||||
case 7:
|
||||
case 10:
|
||||
case 11:
|
||||
return PhaseShiftKeying<8, cmplx, code_type>::map(b);
|
||||
case 8:
|
||||
case 9:
|
||||
case 12:
|
||||
case 13:
|
||||
switch (mod_bits) {
|
||||
case 2:
|
||||
return PhaseShiftKeying<4, cmplx, code_type>::map(b);
|
||||
case 3:
|
||||
return PhaseShiftKeying<8, cmplx, code_type>::map(b);
|
||||
}
|
||||
return 0;
|
||||
}
|
||||
Encoder(DSP::WritePCM<value> *pcm, const uint8_t *inp, int freq_off, uint64_t call_sign, int oper_mode) :
|
||||
pcm(pcm), crc0(0xA8F4), crc1(0xD419CC15), bchenc({
|
||||
0b100011101, 0b101110111, 0b111110011, 0b101101001,
|
||||
0b110111101, 0b111100111, 0b100101011, 0b111010111,
|
||||
0b000010011, 0b101100101, 0b110001011, 0b101100011,
|
||||
0b100011011, 0b100111111, 0b110001101, 0b100101101,
|
||||
0b101011111, 0b111111001, 0b111000011, 0b100111001,
|
||||
0b110101001, 0b000011111, 0b110000111, 0b110110001}),
|
||||
oper_mode(oper_mode)
|
||||
bool prepare()
|
||||
{
|
||||
switch (oper_mode) {
|
||||
case 6:
|
||||
|
|
@ -274,10 +260,24 @@ struct Encoder
|
|||
frozen_bits = frozen_64512_43072;
|
||||
break;
|
||||
default:
|
||||
return;
|
||||
return false;
|
||||
}
|
||||
cons_cnt = cons_bits / mod_bits;
|
||||
cons_rows = cons_cnt / cons_cols;
|
||||
return true;
|
||||
}
|
||||
Encoder(DSP::WritePCM<value> *pcm, const uint8_t *inp, int freq_off, uint64_t call_sign, int oper_mode) :
|
||||
pcm(pcm), crc0(0xA8F4), crc1(0xD419CC15), bchenc({
|
||||
0b100011101, 0b101110111, 0b111110011, 0b101101001,
|
||||
0b110111101, 0b111100111, 0b100101011, 0b111010111,
|
||||
0b000010011, 0b101100101, 0b110001011, 0b101100011,
|
||||
0b100011011, 0b100111111, 0b110001101, 0b100101101,
|
||||
0b101011111, 0b111111001, 0b111000011, 0b100111001,
|
||||
0b110101001, 0b000011111, 0b110000111, 0b110110001}),
|
||||
oper_mode(oper_mode)
|
||||
{
|
||||
if (!prepare())
|
||||
return;
|
||||
int offset = (freq_off * symbol_len) / rate;
|
||||
code_off = offset - cons_cols / 2;
|
||||
mls0_off = offset - mls0_len + 1;
|
||||
|
|
|
|||
Loading…
Add table
Add a link
Reference in a new issue